Datasheet

iv
7766F–AVR–11/10
ATmega16/32U4
18.3Frame Formats ....................................................................................................190
18.4USART Initialization ............................................................................................192
18.5Data Transmission – The USART Transmitter ....................................................193
18.6Data Reception – The USART Receiver .............................................................195
18.7Asynchronous Data Reception ............................................................................199
18.8Multi-processor Communication Mode ................................................................202
18.9Hardware Flow Control ........................................................................................203
18.10USART Register Description .............................................................................205
18.11Examples of Baud Rate Setting ........................................................................209
19 USART in SPI Mode ............................................................................. 214
19.1Overview .............................................................................................................214
19.2Clock Generation .................................................................................................214
19.3SPI Data Modes and Timing ...............................................................................215
19.4Frame Formats ....................................................................................................215
19.5Data Transfer ......................................................................................................217
19.6USART MSPIM Register Description ..................................................................219
19.7AVR USART MSPIM vs. AVR SPI ......................................................................221
20 2-wire Serial Interface .......................................................................... 223
20.1Features ..............................................................................................................223
20.22-wire Serial Interface Bus Definition ..................................................................223
20.3Data Transfer and Frame Format ........................................................................224
20.4Multi-master Bus Systems, Arbitration and Synchronization ...............................227
20.5Overview of the TWI Module ...............................................................................228
20.6TWI Register Description ....................................................................................231
20.7Using the TWI ......................................................................................................234
20.8Transmission Modes ...........................................................................................238
20.9Multi-master Systems and Arbitration ..................................................................251
21 USB controller ...................................................................................... 253
21.1Features ..............................................................................................................253
21.2Block Diagram .....................................................................................................253
21.3Typical Application Implementation .....................................................................254
21.4Crystal-less operation ..........................................................................................256
21.5Design guidelines ................................................................................................256
21.6General Operating Modes ...................................................................................257
21.7Power modes ......................................................................................................259