Datasheet

7766F–AVR–11/10

ATmega16/32U4

• Bit 7– PINMUX: PLL Input Multiplexer

This bit selects the clock input of the PLL:

– PINMUX = 0: the PLL input is connected to the PLL Prescaler, that has the Primary

System Clock as source

– PINMUX = 1: the PLL input is directly connected to the Internal Calibrated 8MHz RC

Oscillator. This mode allows to work in USB Low Speed mode with no crystal or

using a crystal with a value different of 8/16MHz.

• Bit 6– PLLUSB: PLL Postcaler for USB Peripheral

This bit select the division factor between the PLL output frequency and the USB module input

frequency:

– PLLUSB = 0: no division, direct connection (if PLL Output = 48 MHz)

– PLLUSB = 1: PLL Output frequency is divided by 2 and sent to USB module (if PLL

Output = 96MHz)

• Bit 5..4 – PLLTM1:0: PLL Postcaler for High Speed Timer

These bits codes for the division factor between the PLL Output Frequency and the High Speed

Timer input frequency.

Note that the division factor 1.5 will introduce some jitter in the clock, but keeping the error null

since the average duty cycle is 50%. See

Figure 6-7 for more details.

Figure 6-7. PLL Postcaler operation with division factor = 1.5

• Bit 3..0 – PDIV3:0 PLL Lock Frequency

These bits configure the PLL internal VCO clock reference according to the required output fre-

quency value.

PLLTM1 PLLTM0 PLL Postcaler Factor for High-Speed Timer

0 0 0 (Disconnected)

01 1

10 1.5

11 2

PDIV3 PDIV2 PDIV1 PDIV0 PLL Output Frequency

0 0 0 0 Not allowed

0 0 0 1 Not allowed

0 0 1 0 Not allowed

0011 40 MHz

0100 48 MHz

Fi x ---