Datasheet

380
7766F–AVR–11/10
ATmega16/32U4
7. Maximum regulator output current should be reduced by the USB buffer current required when USB is active (about 25mA).
The remaining regulator output current can be used for the external application.
8. As specified on the USB Electrical chapter, the D+/D- pads can withstand voltages down to -1V applied through a 39 Ohms
resistor
29.3 External Clock Drive Waveforms
Figure 29-1. External Clock Drive Waveforms
29.4 External Clock Drive
Note: All DC Characteristics contained in this datasheet are based on simulation and characterization of
other AVR microcontrollers manufactured in the same process technology. These values are pre-
liminary values representing design targets, and will be updated after characterization of actual
silicon.
29.5 Maximum speed vs. V
CC
Maximum frequency is depending on V
CC.
As shown in Figure 29-2, the Maximum Frequency vs.
V
CC
curve is linear between 2.7V < V
CC
< 5.5V.
V
IL1
V
IH1
Table 29-1. External Clock Drive
Symbol Parameter
V
CC
=1.8-5.5V V
CC
=2.7-5.5V V
CC
=4.5-5.5V
UnitsMin. Max. Min. Max. Min. Max.
1/t
CLCL
Oscillator
Frequency
0208016MHz
t
CLCL
Clock Period 500 125 62.5 ns
t
CHCX
High Time 200 50 25 ns
t
CLCX
Low Time 200 50 25 ns
t
CLCH
Rise Time 2.0 1.6 0.5 μs
t
CHCL
Fall Time 2.0 1.6 0.5 μs
Δt
CLCL
Change in period
from one clock
cycle to the next
22 2%