Datasheet

313
7766F–AVR–11/10
ATmega16/32U4
24.9.5 Digital Input Disable Register 0 – DIDR0
• Bit 7:4, 1:0 – ADC7D..4D - ADC1D..0D : ADC7:4 - ADC1:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7..4 / ADC1..0 pin and the digital input from this pin is not
needed, this bit should be written logic one to reduce power consumption in the digital input
buffer.
24.9.6 Digital Input Disable Register 2 – DIDR2
• Bit 5:0 – ADC13D..ADC8D: ADC13:8 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC13..8 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
1 0 0 1 Timer/Counter4 Compare Match A
1 0 1 0 Timer/Counter4 Compare Match B
1 0 1 1 Timer/Counter4 Compare Match D
Table 24-6. ADC Auto Trigger Source Selections (Continued)
ADTS3 ADTS2 ADTS1 ADTS0 Trigger Source
Bit 76543210
ADC7D ADC6D ADC5D ADC4D - - ADC1D ADC0D DIDR0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
- - ADC13D ADC12D ADC11D ADC10D ADC9D ADC8D DIDR2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000