Datasheet

7766F–AVR–11/10

ATmega16/32U4

• 3 - EORSTE - End Of Reset Interrupt Enable Bit

Set to enable the EORSTI interrupt. This bit is set after a reset.

Clear to disable the EORSTI interrupt.

• 2 - SOFE - Start Of Frame Interrupt Enable Bit

Set to enable the SOFI interrupt.

Clear to disable the SOFI interrupt.

• 1 - Reserved

The value read from this bits is always 0. Do not set this bit

• 0 - SUSPE - Suspend Interrupt Enable Bit

Set to enable the SUSPI interrupt.

Clear to disable the SUSPI interrupt.

• 7 - ADDEN - Address Enable Bit

Set to activate the UADD (USB address).

Cleared by hardware. Clearing by software has no effect.

See Section 22.7, page 268 for more details.

• 6-0 - UADD6:0 - USB Address Bits

Load by software to configure the device address.

• 7-3 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 2-0 - FNUM10:8 - Frame Number Upper Value

Set by hardware. These bits are the 3 MSB of the 11-bits Frame Number information. They are

provided in the last received SOF packet. FNUM is updated if a corrupted SOF is received.

Bit 76543210

ADDEN UADD6:0 UDADDR

Read/Write W R/W R/W R/W R/W R/W R/W R/W

Initial Val-

00000000

Bit 76543 2 1 0

----- FNUM10:8 UDFNUMH

Read/Write R R R R R R R R

Initial Value 0 0 0 0 0 0 0 0

Bit 76543210

FNUM7:0 UDFNUML

Read/WriteRRRRRRRR

Initial Value00000000