Datasheet

162
7766F–AVR–11/10
ATmega16/32U4
15.12 Register Description
15.12.1 TCCR4A – Timer/Counter4 Control Register A
• Bits 7,6 - COM4A1, COM4A0: Comparator A Output Mode, Bits 1 and 0
These bits control the behavior of the Waveform Output (OCW4A) and the connection of the
Output Compare pin (OC4A). If one or both of the COM4A1:0 bits are set, the OC4A output
overrides the normal port functionality of the I/O pin it is connected to. The complementary
OC4B
output is connected only in PWM modes when the COM4A1:0 bits are set to “01”. Note
that the Data Direction Register (DDR) bit corresponding to the OC4A and OC4A
pins must be
set in order to enable the output driver.
The function of the COM4A1:0 bits depends on the PWM4A, WGM40 and WGM41 bit settings.
Table 15-6 shows the COM4A1:0 bit functionality when the PWM4A bit is set to Normal Mode
(non-PWM).
Table 15-7 shows the COM4A1:0 bit functionality when the PWM4A, WGM40 and WGM41 bits
are set to fast PWM mode.
Bit 76543210
COM4A1 COM4A0 COM4B1 COM4B0 FOC4A FOC4B PWM4A PWM4B TCCR4A
Read/Write R/W R/W R/W R/W W W R/W R/W
Initial value00000000
Table 15-6. Compare Output Mode, Normal Mode (non-PWM)
COM4A1..0 OCW4A Behavior OC4A Pin OC4A Pin
00 Normal port operation. Disconnected Disconnected
01 Toggle on Compare Match. Connected Disconnected
10 Clear on Compare Match. Connected Disconnected
11 Set on Compare Match. Connected Disconnected
Table 15-7. Compare Output Mode, Fast PWM Mode
COM4A1..0 OCW4A Behavior OC4A OC4A
00 Normal port operation. Disconnected Disconnected
01
Cleared on Compare Match.
Set when TCNT4 = 0x000.
Connected Connected
10
Cleared on Compare Match.
Set when TCNT4 = 0x000.
Connected Disconnected
11
Set on Compare Match.
Cleared when TCNT4 = 0x000.
Connected Disconnected