Datasheet

108
7766F–AVR–11/10
ATmega16/32U4
14. 16-bit Timers/Counters (Timer/Counter1 and Timer/Counter3)
The 16-bit Timer/Counter unit allows accurate program execution timing (event management),
wave generation, and signal timing measurement. The main features are:
•
True 16-bit Design (i.e., Allows 16-bit PWM)
• Three independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Ten independent interrupt sources (TOV1, OCF1A, OCF1B, OCF1C, ICF1, TOV3, OCF3A, OCF3B,
OCF3C and ICF3)
14.1 Overview
Most register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, and a) lower case “x” replaces the Output Compare unit
channel. However, when using the register or bit defines in a program, the precise form must be
used, i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 14-1. For the actual
placement of I/O pins, see “Pinout ATmega16U4/ATmega32U4” on page 3. CPU accessible I/O
Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register
and bit locations are listed in the “16-bit Timers/Counters (Timer/Counter1 and Timer/Counter3)”
on page 108.
The Power Reduction Timer/Counter1 bit, PRTIM1, in “Power Reduction Register 0 - PRR0” on
page 46 must be written to zero to enable Timer/Counter1 module.
The Power Reduction Timer/Counter3 bit, PRTIM3, in “Power Reduction Register 1 - PRR1” on
page 46 must be written to zero to enable Timer/Counter3 module.