Datasheet

10 / 66 W5500 Datasheet Version1.0.9
High: deselected
33
SCLK
-
I
SPI clock input
This pin is used to receive SPI Clock from SPI master.
34
MISO
-
O
SPI master input slave(W5500) output
When SCSn is Low, this pin outputs SPI data.
When SCSn is High, this pin becomes High Impedance
(logically disconnected).
35
MOSI
-
I
SPI master output slave(W5500) input
36
INTn
-
O
Interrupt output
(Active low)
Low: Interrupt asserted from W5500
High: No interrupt
37
RSTn
Pull-up
I
Reset
(Active low)
RESET should be held low at least 500 us for W5500
reset.
38
RSVD
Pull-down
I
NC
39
RSVD
Pull-down
I
NC
40
RSVD
Pull-down
I
NC
41
RSVD
Pull-down
I
NC
42
RSVD
Pull-down
I
NC
43
PMODE2
Pull-up
I
PHY Operation mode select pins
These pins determine the network mode. Refer to the
below table for details.
PMODE [2:0]
Description
2
1
0
0
0
0
10BT Half-duplex, Auto-negotiation disabled
0
0
1
10BT Full-duplex, Auto-negotiation disabled
0
1
0
100BT Half-duplex, Auto-negotiation disabled
0
1
1
100BT Full-duplex, Auto-negotiation disabled
1
0
0
100BT Half-duplex, Auto-negotiation enabled
1
0
1
Not used
1
1
0
Not used
1
1
1
All capable, Auto-negotiation enabled
.
44
PMODE1
Pull-up
I
45
PMODE0
Pull-up
I
46
-
-
-
NC
47
-
-
-
NC
48
AGND
-
GND
Analog ground