Datasheet

V
CC
Time
V
CC_GH
V
CC_GW
V
CC
Ramp-Up
Time to Re-Ramp
Time
Ramp-Down
V
CC
drops below V 50 mV
PORF
–
V
CC_RT
V
CC_FT
V
CC_TRR
23
TCA9548A
www.ti.com SCPS207F –MAY 2012–REVISED NOVEMBER 2016
Product Folder Links: TCA9548A
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(1) All supply sequencing and ramp rate values are measured at T
A
= 25°C
10 Power Supply Recommendations
The operating power-supply voltage range of the TCA9548A is 1.65 V to 5.5 V applied at the VCC pin. When the
TCA9548A is powered on for the first time or anytime the device must be reset by cycling the power supply, the
power-on reset requirements must be followed to ensure the I
2
C bus logic is initialized properly.
10.1 Power-On Reset Requirements
In the event of a glitch or data corruption, TCA9548A can be reset to its default conditions by using the power-on
reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This
reset also happens when the device is powered on for the first time in an application.
A power-on reset is shown in Figure 17.
V
CC
is Lowered Below the POR Threshold, Then Ramped Back Up to V
CC
Figure 17. Power-On Reset Waveform
Table 3 specifies the performance of the power-on reset feature for TCA9548A for both types of power-on reset.
Table 3. Recommended Supply Sequencing and Ramp Rates
(1)
PARAMETER MIN MAX UNIT
V
CC_FT
Fall time See Figure 17 1 100 ms
V
CC_RT
Rise time See Figure 17 0.1 100 ms
V
CC_TRR
Time to re-ramp (when V
CC
drops below V
PORF(min)
– 50 mV or
when V
CC
drops to GND)
See Figure 17 40 μs
V
CC_GH
Level that V
CC
can glitch down to, but not cause a functional
disruption when V
CC_GW
= 1 μs
See Figure 18 1.2 V
V
CC_GW
Glitch width that does not cause a functional disruption when
V
CC_GH
= 0.5 × V
CC
See Figure 18 10 μs
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width
(V
CC_GW
) and height (V
CC_GH
) are dependent on each other. The bypass capacitance, source impedance, and
device impedance are factors that affect power-on reset performance. Figure 18 and Table 3 provide more
information on how to measure these specifications.
Figure 18. Glitch Width and Glitch Height