Datasheet
15
TCA9548A
www.ti.com
SCPS207F –MAY 2012–REVISED NOVEMBER 2016
Product Folder Links: TCA9548A
Submit Documentation FeedbackCopyright © 2012–2016, Texas Instruments Incorporated
Programming (continued)
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read
is selected, while a low (0) selects a write operation.
Table 1 shows the TCA9548A address reference.
Table 1. Address Reference
INPUTS
I
2
C BUS SLAVE ADDRESS
A2 A1 A0
L L L 112 (decimal), 70 (hexadecimal)
L L H 113 (decimal), 71 (hexadecimal)
L H L 114 (decimal), 72 (hexadecimal)
L H H 115 (decimal), 73 (hexadecimal)
H L L 116 (decimal), 74 (hexadecimal)
H L H 117 (decimal), 75 (hexadecimal)
H H L 118 (decimal), 76 (hexadecimal)
H H H 119 (decimal), 77 (hexadecimal)
8.5.3 Bus Transactions
Data must be sent to and received from the slave devices, and this is accomplished by reading from or writing to
registers in the slave device.
Registers are locations in the memory of the slave which contain information, whether it be the configuration
information or some sampled data to send back to the master. The master must write information to these
registers in order to instruct the slave device to perform a task.
While it is common to have registers in I
2
C slaves, note that not all slave devices have registers. Some devices
are simple and contain only 1 register, which may be written to directly by sending the register data immediately
after the slave address, instead of addressing a register. The TCA9548A is example of a single-register device,
which is controlled via I
2
C commands. Since it has 1 bit to enable or disable a channel, there is only 1 register
needed, and the master merely writes the register data after the slave address, skipping the register number.
8.5.3.1 Writes
To write on the I
2
C bus, the master sends a START condition on the bus with the address of the slave, as well
as the last bit (the R/W bit) set to 0, which signifies a write. The slave acknowledges, letting the master know it is
ready. After this, the master starts sending the control register data to the slave until the master has sent all the
data necessary (which is sometimes only a single byte), and the master terminates the transmission with a STOP
condition.
There is no limit to the number of bytes sent, but the last byte sent is what is in the register.
Figure 10 shows an example of writing a single byte to a slave register.