Data Sheet

908
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
33.9.11 Comparator Control n
The configuration of comparator n is protected while comparator n is enabled (COMPCTRLn.ENABLE=1). Changes to
the other bits in COMPCTRLn can only occur when COMPCTRLn.ENABLE is zero.
Name: COMPCTRLn
Offset: 0x10+n*0x4 [n=0..1]
Reset: 0x00000000
Property: Write-Protected, Write-Synchronized
z Bits 31:27 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 26:24 – FLEN[2:0]: Filter Length
These bits configure the filtering for comparator n. COMPCTRLn.FLEN can only be written while COMPC-
TRLn.ENABLE is zero.
These bits are not synchronized.
Table 33-6. Filter Length
Bit 3130292827262524
FLEN[2:0]
AccessRRRRRR/WR/WR/W
Reset00000000
Bit 2322212019181716
HYST OUT[1:0]
AccessRRRRR/WRR/WR/W
Reset00000000
Bit 151413121110 9 8
SWAP
MUXPOS[1:0] MUXNEG[2:0]
Access R/W R R/W R/W R R/W R/W R/W
Reset00000000
Bit 76543210
INTSEL[1:0] SPEED[1:0] SINGLE ENABLE
Access R R/W R/W R R/W R/W R/W R/W
Reset00000000
FLEN[2:0] Name Description
0x0 OFF No filtering