Data Sheet

905
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
33.9.8 Status B
Name: STATUSB
Offset: 0x09
Reset: 0x00
Property: -
z Bit 7 – SYNCBUSY: Synchronization Busy
This bit is cleared when the synchronization of registers between the clock domains is complete.
This bit is set when the synchronization of registers between clock domains is started.
z Bits 6:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 1:0 – READYx [x=1..0]: Comparator x Ready
This bit is cleared when the comparator x output is not ready.
This bit is set when the comparator x output is ready.
If comparator x is not implemented, READYx always reads as zero.
Bit 76543210
SYNCBUSY READY1 READY0
AccessRRRRRRRR
Reset00000000