Data Sheet

83
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
12.13.18Component Identification 1
Name: CID1
Offset: 0x1FF4
Reset: 0x00000010
Property: -
z Bits 31:8 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 7:4 – CCLASS[3:0]: Component Class
These bits will always return 0x1 when read indicating that this ARM CoreSight component is ROM table (refer to
the ARM Debug Interface v5 Architecture Specification at http://www.arm.com).
z Bits 3:0 – PREAMBLE[3:0]: Preamble
These bits will always return 0x0 when read.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
AccessRRRRRRRR
Reset00000000
Bit 151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit 76543210
CCLASS[3:0] PREAMBLE[3:0]
AccessRRRRRRRR
Reset00010000