Data Sheet
829
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
31.8.6.6 Host Pipe Interrupt Flag Register
Name:
PINTFLAG
Offset: 0x107 + (n x 0x20)
Reset: 0x0000
Property: -
z Bits 7:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 5 – STALL: STALL Received Interrupt Flag
This flag is cleared by writing a one to the flag.
This flag is set when a stall occurs and will generate an interrupt if PINTENCLR/SET.STALL is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the STALL Interrupt Flag.
z Bit 4 – TXSTP: Transmitted Setup Interrupt Flag
This flag is cleared by writing a one to the flag.
This flag is set when a Transfer Complete occurs and will generate an interrupt if PINTENCLR/SET.TXSTP is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the TXSTP Interrupt Flag.
z Bit 3 – PERR: Pipe Error Interrupt Flag
This flag is cleared by writing a one to the flag.
This flag is set when a pipe error occurs and will generate an interrupt if PINTENCLR/SET.PERR is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the PERR Interrupt Flag.
z Bit 2 – TRFAIL: Transfer Fail Interrupt Flag
This flag is cleared by writing a one to the flag.
This flag is set when a Transfer Fail occurs and will generate an interrupt if PINTENCLR/SET.TRFAIL is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the TRFAIL Interrupt Flag.
z Bit 1 – TRCPT1: Transfer Complete 1 interrupt Flag
This flag is cleared by writing a one to the flag.
This flag is set when a Transfer Complete occurs and will generate an interrupt if PINTENCLR/SET.TRCPT1 is
one. PINTFLAG.TRCPT1 is set for a double bank IN/OUT pipe when current bank is 1.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the TRCPT1 Interrupt Flag.
z Bit 0 – TRCPT0: Transfer Complete 0 interrupt Flag
This flag is cleared by writing a one to the flag.
Bit76543210
STALL TXSTP PERR TRFAIL TRCPT1 TRCPT0
Access R R RW1 RW1 RW1 RW1 RW1 RW1
Reset00000000