Data Sheet

818
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
1: The Down Resume interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Down Resume interrupt Enable bit and enable the DNRSM interrupt.
z Bit 4 – WAKEUP: Wake Up Interrupt Enable
0: The WakeUp interrupt is disabled.
1: The WakeUp interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Wake Up interrupt Enable bit and enable the WAKEUP interrupt request.
z Bit 3 – RST: Bus Reset Interrupt Enable
0: The Bus Reset interrupt is disabled.
1: The Bus Reset interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Bus Reset interrupt Enable bit and enable the Bus RST interrupt.
z Bit 2 – HSOF: Host Start-of-Frame Interrupt Enable
0: The Host Start-of-Frame interrupt is disabled.
1: The Host Start-of-Frame interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Host Start-of-Frame interrupt Enable bit and enable the HSOF interrupt.
z Bits 1:0 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.