Data Sheet

791
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
31.8.3 Device Registers - Endpoint
31.8.3.1 Device Endpoint Configuration register n
Name:
EPCFGx
Offset: 0x100 + (n x 0x20)
Reset: 0x00
Property: Write-Protected
z Bit 7 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z Bits 6:4 – EPTYPE1[2:0]: Type of the Endpoint for IN direction
These bits contains the endpoint type for IN direction.
Table 31-14. Type of Endpoint
Upon receiving a USB reset EPCFGn.EPTYPE1 is cleared except for endpoint 0 which is unchanged.
z Bit 3 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
Bit76543210
ETYPE1[2:0] ETYPE0[2:0]
Access R R/W R/W R/W R R/W R/W R/W
Reset00000000
EPTYPE1[2:0] Description
0x0 Bank1 is disabled
0x1 Bank1 is enabled and configured as Control IN
0x2 Bank1 is enabled and configured as Isochronous IN
0x3 Bank1 is enabled and configured as Bulk IN
0x4 Bank1 is enabled and configured as Interrupt IN
0x5
Bank1 is enabled and configured as Dual-Bank OUT
(EndPoint type is the same as the one defined in EPTYPE0)
0x6-0x7 Reserved