Data Sheet

779
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
31.8.2 Device Registers - Common
31.8.2.1 Control B
Name:
CTRLB
Offset: 0x08
Reset: 0x0001
Property: Write-Protected
z Bits 15:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 11:10 – LPMHDSK[1:0]: Link Power Management Handshake
These bits select the Link Power Management Handshake configuration as shown in Table 31-10.
Table 31-10. LPMHDSK Selection
z Bit 9 – GNAK: Global NAK
This bit configures the operating mode of the NAK.
0: The handshake packet reports the status of the USB transaction
1: A NAK handshake is answered for each USB transaction regardless of the current endpoint memory bank
status
This bit is not synchronized.
z Bits 8:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 4 – NREPLY: No reply excepted SETUP Token
0: Disable the “NO_REPLY” feature: Any transaction to endpoint 0 will be handled according to the USB2.0
standard.
1: Enable the “NO_REPLY” feature: Any transaction to endpoint 0 will be ignored except SETUP.
This bit is cleared by hardware when receiving a SETUP packet.
Bits 15 14 13 12 11 10 9 8
LPMHD[1:0] GNAK
AccessRRRRR/WR/WR/WR/
Reset00000000
Bits76543210
NREPLY SPDCONF[1:0] UPRSM DETACH
AccessRRRRR/WR/WR/WR/W
Reset00000000
LPMHDSK[1:0] Description
0x0 No handshake. LPM is not supported
0x1 ACK
0x2 NYET
0x3 Reserved