Data Sheet

775
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
31.8.1.3 QOS Control
Name:
QOSCTRL
Offset: 0x03
Reset: 0x00
Property: Write-Protected
z Bits 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 3:2 –DQOS[1:0]: Data Quality of Service
These bits define the memory priority access during the endpoint or pipe read/write data operation.Refer to “SRAM
Quality of Service” on page 39.
z Bits 1:0 – CQOS[1:0]: Configuration Quality of Service
These bits define the memory priority access during the endpoint or pipe read/write configuration operation.Refer
to “SRAM Quality of Service” on page 39.
Bit76543210
DQOS[1:0] CQOS[1:0]
Access R R R R R/W R/W R/W R/W
Reset00000101