Data Sheet

736
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
30.8.21 Waveform Control Buffer
Name: WAVEB
Offset: 0x68
Reset: 0x00000000
Property: -
z Bits 31:28 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 27:24 – SWAPBx [x=3..0]: Swap DTI Output Pair x Buffer
These bits represent the SWAP buffers. When the double buffering is enable, SWAPB bits value is copied to the
SWAP bits on an UPDATE condition.
z Bits 23:20 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 19:16 – POLBx [x=3..0]: Channel x Polarity Buffer
These bits represent the POL buffers. When the double buffering is enable, POLB bits value is copied to the POL
bits on an UPDATE condition.
z Bits 15:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
Bit 3130292827262524
SWAPB3 SWAPB2 SWAPB1 SWAPB0
AccessRRRRR/WR/WR/WR/W
Reset00000000
Bit 2322212019181716
POLB3 POLB2 POLB1 POLB0
AccessRRRRR/WR/WR/WR/W
Reset00000000
Bit 151413121110 9 8
CICCENB3 CICCENB2 CICCENB1 CICCENB0
AccessRRRRR/WR/WR/WR/W
Reset00000000
Bit 76543210
CIPERENB RAMPB[1:0] WAVEGENB[2:0]
Access R/W R R/W R/W R R/W R/W R/W
Reset00000000