Data Sheet

709
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
z Bits 15:14 – TCEIx [x=1..0]: Timer/counter Event x Input Enable
This bit is used to enable input event x to the TCC.
0: Incoming event x is disabled.
1: Incoming event x is enabled.
z Bits 13:12 – TCINVx [x=1..0]: Inverted Event x Input Enable
This bit inverts the event x input.
0: Input event source x is not inverted.
1: Input event source x is inverted.
z Bit 11 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z Bit 10 – CNTEO: Timer/counter Output Event Enable
This bit is used to enable the counter cycle event. When enabled, an event will be generated on begin or end of
counter cycle depending of CNTSEL[1:0] settings.
0: Counter cycle output event is disabled and will not be generated.
1: Counter cycle output event is enabled and will be generated depend of CNTSEL[1:0] value.
z Bit 9 – TRGEO: Retrigger Output Event Enable
This bit is used to enable the counter retrigger event. When enabled, an event will be generated when the counter
retriggers operation.
0: Counter retrigger event is disabled and will not be generated.
1: Counter retrigger event is enabled and will be generated for every counter retrigger.
z Bit 8 – OVFEO: Overflow/Underflow Output Event Enable
This bit is used to enable the overflow/underflow event. When enabled, an event will be generated when the coun-
ter reaches the TOP or the ZERO value.
0: Overflow/underflow counter event is disabled and will not be generated.
1: Overflow/underflow counter event is enabled and will be generated for every counter overflow/underflow.
z Bits 7:6 – CNTSEL[1:0]: Timer/counter Output Event Mode
These bits define on which part of the counter cycle the counter event output is generated.
Table 30-23. Timer/counter Output Event Mode
z Bits 5:3 – EVACT1[2:0]: Timer/counter Input Event1 Action
These bits define the action the TCC will perform on TCCx EV1 event input, as shown in the table below.
CNTSEL[1:0] Name Description
0x0 START
An interrupt/event is generated when a new counter cycle
starts
0x1 END An interrupt/event is generated when a counter cycle ends
0x2 BETWEEN
An interrupt/event is generated when a counter cycle ends,
except for the first and last cycles
0x3 BOUNDARY
An interrupt/event is generated when a new counter cycle
starts or a counter cycle ends