Data Sheet

702
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
Table 30-21. Fault B Blanking Mode
z Bit 4 – QUAL: Fault B Qualification
Setting this bit, enables the recoverable Fault B input qualification.
0: The recoverable Fault B input is not disabled on CMPx value condition.
1: The recoverable Fault B input is disabled when output signal is at inactive level (CMPx == 0).
z Bit 3 – KEEP: Fault B Keeper
Setting this bit enables the Fault B keep action.
0: The Fault B state is released as soon as the recoverable Fault B is released.
1: The Fault B state is released at the end of TCC cycle.
z Bit 2 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z Bits 1:0 – SRC[1:0]: Fault B Source
These bits select the TCC event input for recoverable Fault B, as defined in the table below.
Event system channel connected to MCEx event input, must be configured to route the event asynchronously,
when used as a recoverable Fault B input.
Table 30-22. Fault B Source
BLANK[1:0] Name Description
0x0 NONE No Blanking applied
0x1 RISE Blanking applied from rising edge of the output waveform
0x2 FALL Blanking applied from falling edge of the output waveform
0x3 BOTH Blanking applied from each toggle of the output waveform
SRC[1:0] Name Description
0x0 DISABLE Fault input disabled
0x1 ENABLE MCEx (x=0,1) event input
0x2 INVERT Inverted MCEx (x=0,1) event input
0x3 ALTFAULT Alternate fault (A or B) state at the end of the previous period