Data Sheet

607
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
z Bits 10:8 – DATASIZE[2:0]: Data Word Size
This field defines the number of bits in each data sample. For 8-bit compact stereo, two 8-bit data samples are
packed in bits 15 to 0 of the DATAm register. For 16-bit compact stereo, two 16-bit data samples are packed in bits
31 to 0 of the DATAm register. Refer to Table 28-17 for details.
Table 28-17. Data Word Size
z Bit 7 – SLOTADJ: Data Slot Formatting Adjust
This field defines left or right adjustment of data samples in the slot. Refer to Table 28-18 for details.
Table 28-18. Data Slot Formatting Adjust
z Bit 6 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z Bit 5 – CLKSEL: Clock Unit Selection. Refer to Table 28-19 for details.
Table 28-19. Clock Unit Selection
z Bit 4 – TXSAME: Transmit Data when Underrun
Refer to Table 28-20 for details.
Table 28-20. Transmit Data when Underrun
DATASIZE[2:0] Name Description
0x0 32 32 bits
0x1 24 24 bits
0x2 20 20 bits
0x3 18 18 bits
0x4 16 16 bits
0x5 16C 16 bits compact stereo
0x6 8 8 bits
0x7 8C 8 bits compact stereo
SLOTADJ Name Description
0x0 RIGHT Data is right adjusted in slot
0x1 LEFT Data is left adjusted in slot
CLKSEL Name Description
0x0 CLK0 Use Clock Unit 0
0x1 CLK1 Use Clock Unit 1
TXSAME Name Description
0x0 ZERO Zero data transmitted in case of underrun
0x1 SAME Last data transmitted in case of underrun