Data Sheet

59
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
z ADDR: Address of the word containing the failing bit.
z DATA: contains data to identify which bit failed, and during which phase of the test it failed. The DATA
register will in this case contains the following bit groups:
Table 12-4. DATA bits Description When MBIST Operation Returns An Error
z bit_index: contains the bit number of the failing bit
z phase: indicates which phase of the test failed and the cause of the error. See Table 12-5 on page 59.
12.11.6 System Services Availability When Accessed Externally
External access: Access performed in the DSU address offset 0x200-0x1FFF range.
Internal access: Access performed in the DSU address offset 0x0-0x100 range.
Bit3130292827262524
Bit2322212019181716
Bit151413121110 9 8
phase
Bit76543210
bit_index
Table 12-5. MBIST Operation Phases
Phase Test Actions
0 Write all bits to zero. This phase cannot fail.
1 Read 0, write 1, increment address
2 Read 1, write 0
3 Read 0, write 1, decrement address
4 Read 1, write 0, decrement address
5 Read 0, write 1
6 Read 1, write 0, decrement address
7 Read all zeros. bit_index is not used