Data Sheet

514
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
Figure 27-2. Basic I
2
C Transaction Diagram
Figure 27-3. Transaction Diagram Syntax
27.6.2 Basic Operation
27.6.2.1 Initialization
The following registers are enable-protected, meaning they can be written only when the I
2
C interface is disabled
(CTRLA.ENABLE is zero):
z Control A register (CTRLA), except Enable (CTRLA.ENABLE) and Software Reset (CTRLA.SWRST)
z Control B register (CTRLB), except Acknowledge Action (CTRLB.ACKACT) and Command (CTRLB.CMD)
z Baud Rate register (BAUD)
z Address register (ADDR) while in slave operation
PS
ADDRESS
6 ... 0
R/W ACK ACK
7 ... 0
DATA ACK/NACK
7 ... 0
DATA
SDA
SCL
S A A/AR/WADDRESS DATA PA DATA
Address Packet Data Packet #0
Transaction
Data Packet #1
Direction
"0"
"1"
Master Drives Bus
Slave Drives Bus
Either Master or Slave
Drives Bus
S
Sr
P
START Condition
Repeated START Condition
STOP Condition
A
A
Acknowledge (ACK)
Not Acknowledge (NACK)
R
W
Master Read
Master Write
Data Packet Direction:
"0"
"1"
Acknowledge:
Bus Driver: Special Bus Conditions