Data Sheet

503
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
26.8.6 Interrupt Flag Status and Clear
Name: INTFLAG
Offset: 0x18
Reset: 0x00
Property: -
z Bit 7 – ERROR: Error
This flag is cleared by writing a one to it.
This bit is set when any error is detected. Errors that will set this flag have corresponding status flags in the
STATUS register. The BUFOVF error will set this interrupt flag.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the flag.
z Bits 6:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 3 – SSL: Slave Select Low
This flag is cleared by writing a one to it.
This bit is set when a high to low transition is detected on the _SS pin in slave mode and Slave Select Low
Detect (CTRLB.SSDE) is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the flag.
z Bit 2 – RXC: Receive Complete
This flag is cleared by reading the Data (DATA) register or by disabling the receiver.
This flag is set when there are unread data in the receive buffer. If address matching is enabled, the first data
received in a transaction will be an address.
Writing a zero to this bit has no effect.
Writing a one to this bit has no effect.
z Bit 1 – TXC: Transmit Complete
This flag is cleared by writing a one to it or by writing new data to DATA.
In master mode, this flag is set when the data have been shifted out and there are no new data in DATA.
In slave mode, this flag is set when the _SS pin is pulled high. If address matching is enabled, this flag is only set
if the transaction was initiated with an address match.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the flag.
z Bit 0 – DRE: Data Register Empty
This flag is cleared by writing new data to DATA.
This flag is set when DATA is empty and ready for new data to transmit.
Writing a zero to this bit has no effect.
Bit76543210
ERROR SSL RXC TXC DRE
Access R/W R R R R/W R R/W R
Reset00000000