Data Sheet

476
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
25.8.10 Data
Name: DATA
Offset: 0x28
Reset: 0x0000
Property: -
z Bits 15:9 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 8:0 – DATA[8:0]: Data
Reading these bits will return the contents of the Receive Data register. The register should be read only when the
Receive Complete Interrupt Flag bit in the Interrupt Flag Status and Clear register (INTFLAG.RXC) is set. The sta-
tus bits in STATUS should be read before reading the DATA value in order to get any corresponding error.
Writing these bits will write the Transmit Data register. This register should be written only when the Data Register
Empty Interrupt Flag bit in the Interrupt Flag Status and Clear register (INTFLAG.DRE) is set.
Bit151413121110 9 8
DATA[8]
AccessRRRRRRRR/W
Reset00000000
Bit76543210
DATA[7:0]
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset00000000