Data Sheet

473
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
This bit is cleared by writing a one to the bit or by disabling the receiver.
This bit is set if the received character had a frame error, i.e., when the first stop bit is zero.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear it.
z Bit 0 – PERR: Parity Error
Reading this bit before reading the Data register will indicate the error status of the next character to be read.
This bit is cleared by writing a one to the bit or by disabling the receiver.
This bit is set if parity checking is enabled (CTRLA.FORM is 0x1 or 0x5) and a parity error is detected.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear it.