Data Sheet

458
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
Table 25-5. Clock Polarity
z Bit 28 – CMODE: Communication Mode
This bit indicates asynchronous or synchronous communication.
0: Asynchronous communication.
1: Synchronous communication.
This bit is not synchronized.
z Bits 27:24 – FORM[3:0]: Frame Format
These bits define the frame format.
These bits are not synchronized.
Table 25-6. Frame Format
z Bits 23:22 – SAMPA[1:0]: Sample Adjustment
These bits define the sample adjustment.
These bits are not synchronized.
Table 25-7. Sample Adjustment
z Bits 21:20 – RXPO[1:0]: Receive Data Pinout
These bits define the receive data (RxD) pin configuration.
These bits are not synchronized.
CPOL TxD Change RxD Sample
0x0 Rising XCK edge Falling XCK edge
0x1 Falling XCK edge Rising XCK edge
FORM[3:0] Description
0x0 USART frame
0x1 USART frame with parity
0x2-0x3 Reserved
0x4 Auto-baud -- break detection and auto-baud.
0x5 Auto-baud -- break detection and auto-baud with parity
0x6-0xF Reserved
SAMPA[1:0]
16x Over-sampling
(CTRLA.SAMPR=0 or 1)
8x Over-sampling
(CTRLA.SAMPR=2 or 3)
0x0 7-8-9 3-4-5
0x1 9-10-11 4-5-6
0x2 11-12-13 5-6-7
0x3 13-14-15 6-7-8