Data Sheet
429
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
1: The Overrun Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Overrun Channel x Interrupt Enable bit, which enables the Overrun Channel x
interrupt.
z Bits 15:8 – EVDx [x=7..0]: Channel x Event Detection Interrupt Enable
0: The Event Detected Channel x interrupt is disabled.
1: The Event Detected Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Event Detected Channel x Interrupt Enable bit, which enables the Event
Detected Channel x interrupt.
z Bits 7:0 – OVRx [x=7..0]: Channel x Overrun Interrupt Enable
0: The Overrun Channel x interrupt is disabled.
1: The Overrun Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Overrun Channel x Interrupt Enable bit, which enables the Overrun Channel x
interrupt.