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Data Sheet

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Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
1: The Overrun Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Overrun Channel x Interrupt Enable bit, which disables the Overrun Channel
x interrupt.
z Bits 15:8 – EVDx [x=7..0]: Channel x Event Detection Interrupt Enable
0: The Event Detected Channel x interrupt is disabled.
1: The Event Detected Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Event Detected Channel x Interrupt Enable bit, which disables the Event
Detected Channel x interrupt.
z Bits 7:0 – OVRx [x=7..0]: Channel x Overrun Interrupt Enable
0: The Overrun Channel x interrupt is disabled.
1: The Overrun Channel x interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Overrun Channel x Interrupt Enable bit, which disables the Overrun Channel
x interrupt.