Data Sheet

424
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
23.8.4 Channel Status
Name: CHSTATUS
Offset: 0x0C
Reset: 0x000F00FF
Property: -
z Bits 31:28 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 27:24 – CHBUSYx [x=11..8]: Channel x Busy
This bit is cleared when channel x is idle
This bit is set if an event on channel x has not been handled by all event users connected to channel x.
z Bits 23:20 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 19:16 – USRRDYx [x=11..8]: Channel x User Ready
This bit is cleared when at least one of the event users connected to the channel is not ready.
This bit is set when all event users connected to channel x are ready to handle incoming events on channel x.
z Bits 15:8 – CHBUSYx [x=7..0]: Channel x Busy
This bit is cleared when channel x is idle
This bit is set if an event on channel x has not been handled by all event users connected to channel x.
Bit 3130292827262524
CHBUSY11 CHBUSY10 CHBUSY9 CHBUSY8
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
USRRDY11 USRRDY10 USRRDY9 USRRDY8
AccessRRRRRRRR
Reset00001111
Bit 151413121110 9 8
CHBUSY7 CHBUSY6 CHBUSY5 CHBUSY4 CHBUSY3 CHBUSY2 CHBUSY1 CHBUSY0
AccessRRRRRRRR
Reset00000000
Bit 76543210
USRRDY7 USRRDY6 USRRDY5 USRRDY4 USRRDY3 USRRDY2 USRRDY1 USRRDY0
AccessRRRRRRRR
Reset11111111