Data Sheet

42
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
10.6.2 Register Description
Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters and 16-bit halves of a 32-bit register, and
the 8-bit halves of a 16-bit register can be accessed directly.
Refer to “Product Mapping” on page 28 for PAC locations.
10.6.2.1 PAC0 Register Description
Write Protect Clear
Name: WPCLR
Offset: 0x00
Reset: 0x00000000
Property: -
z Bits 31:7 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 6:1 – EIC, RTC, WDT, GCLK, SYSCTRL, PM: Write Protect Disable
0: Write-protection is disabled.
1: Write-protection is enabled.
Writing a zero to these bits has no effect.
Writing a one to these bits will clear the Write Protect bits for the corresponding peripherals.
z Bit 0 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
Bit3130292827262524
AccessRRRRRRRR
Reset00000000
Bit2322212019181716
AccessRRRRRRRR
Reset00000000
Bit151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit76543210
EIC RTC WDT GCLK SYSCTRL PM
Access R R/W R/W R/W R/W R/W R/W R
Reset00000000