Data Sheet

396
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
22.8.7 Data Output Value Set
This register allows the user to set one or more output I/O pin drive levels high, without doing a read-modify-write
operation. Changes in this register will also be reflected in the Data Output Value (OUT), Data Output Value Toggle
(OUTTGL) and Data Output Value Clear (OUTCLR) registers.
Name: OUTSET
Offset: 0x18+x*0x80 [x=0..2]
Reset: 0x00000000
Property: Write-Protected
z Bits 31:0 – OUTSET[31:0]: Port Data Output Value Set
0: The I/O pin output is driven low.
1: The I/O pin output is driven high.
Writing a zero to a bit has no effect.
Writing a one to a bit will set the corresponding bit in the OUT register, which sets the output drive level high for I/O
pins configured as outputs via the Data Direction register (DIR). For pins configured as inputs via the Data Direc-
tion register (DIR) and with pull enabled via the Pull Enable register (PULLEN), these bits will set the input pull
direction to an internal pull-up.
Bit 3130292827262524
OUTSET[31:24]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 2322212019181716
OUTSET[23:16]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 151413121110 9 8
OUTSET[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 76543210
OUTSET[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000