Data Sheet

392
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
22.8.3 Data Direction Set
This register allows the user to set one or more I/O pins as an output, without doing a read-modify-write operation.
Changes in this register will also be reflected in the Data Direction (DIR), Data Direction Toggle (DIRTGL) and Data
Direction Clear (DIRCLR) registers.
Name: DIRSET
Offset: 0x08+x*0x80 [x=0..2]
Reset: 0x00000000
Property: Write-Protected
z Bits 31:0 – DIRSET[31:0]: Port Data Direction Set
0: The I/O pin direction is cleared.
1: The I/O pin direction is set.
Writing a zero to a bit has no effect.
Writing a one to a bit will set the corresponding bit in the DIR register, which configures the I/O pin as an output.
Bit 3130292827262524
DIRSET[31:24]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 2322212019181716
DIRSET[23:16]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 151413121110 9 8
DIRSET[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 76543210
DIRSET[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000