Data Sheet

367
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
21.8.2 Control B
Name: CTRLB
Offset: 0x04
Reset: 0x00000000
Property: Write-Protected
z Bits 31:19 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 18 – CACHEDIS: Cache Disable
This bit is used to disable the cache.
0: The cache is enabled.
1: The cache is disabled.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
CACHEDIS READMODE[1:0]
AccessRRRRRR/WR/WR/W
Reset00000000
Bit 151413121110 9 8
SLEEPPRM[1:0]
AccessRRRRRRR/WR/W
Reset00000000
Bit 76543210
MANW
RWS[3:0]
Access R/W R R R/W R/W R/W R/W R
Reset00000000