Data Sheet

346
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
20.8.3 Non-Maskable Interrupt Control
Name: NMICTRL
Offset: 0x02
Reset: 0x00
Property: Write-Protected
z Bits 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 3 – NMIFILTEN: Non-Maskable Interrupt Filter Enable
0: NMI filter is disabled.
1: NMI filter is enabled.
z Bits 2:0 – NMISENSE[2:0]: Non-Maskable Interrupt Sense
These bits define on which edge or level the NMI triggers.
Table 20-4. Non-Maskable Interrupt Sense
Bit 76543210
NMIFILTEN NMISENSE[2:0]
AccessRRRRR/WR/WR/WR/W
Reset00000000
NMISENSE[2:0] Name Description
0x0 NONE No detection
0x1 RISE Rising-edge detection
0x2 FALL Falling-edge detection
0x3 BOTH Both-edges detection
0x4 HIGH High-level detection
0x5 LOW Low-level detection
0x6-0x7 Reserved