Data Sheet

339
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
When the interrupt has been cleared in edge-sensitive mode, INTFLAG.EXTINT[x] will only be set if a new interrupt
condition is met. In level-sensitive mode, when interrupt has been cleared, INTFLAG.EXTINT[x] will be set immediately if
the EXTINTx pin still matches the interrupt condition.
Each external pin can be filtered by a majority vote filtering, clocked by GCLK_EIC. Filtering is enabled if bit Filter Enable
x in the Configuration y register (CONFIGy.FILTENx) is written to one. The majority vote filter samples the external pin
three times with GCLK_EIC and outputs the value when two or more samples are equal.
When an external interrupt is configured for level detection, or if filtering is disabled, detection is made asynchronously,
and GCLK_EIC is not required.
If filtering or edge detection is enabled, the EIC automatically requests the GCLK_EIC to operate (GCLK_EIC must be
enabled in the GCLK module, see “GCLK – Generic Clock Controller” on page 95 for details). If level detection is
enabled, GCLK_EIC is not required, but interrupt and events can still be generated.
Figure 20-2. Interrupt Detections
The detection delay depends on the detection mode.
Table 20-1. Majority Vote Filter
Samples [0, 1, 2] Filter Output
[0,0,0] 0
[0,0,1] 0
[0,1,0] 0
[0,1,1] 1
[1,0,0] 0
[1,0,1] 1
[1,1,0] 1
[1,1,1] 1
G
CLK
_
EI
C
C
LK_EI
C
_APB
E
XTINT
x
i
ntreq_ext
i
nt
[
x
]
(level detection / no filter)
i
ntre
q_
extint
[
x
]
(level detection / filter
)
i
ntre
q_
extint
[
x
]
(
edge detection
/
no
f
ilter
)
i
ntre
q_
extint
[
x
]
(edge detection / filter
)
N
o interru
p
t
N
o interru
p
t
c
lear INTFLAG.EXTINT
[
x
]