Data Sheet

337
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
20.4 Signal Description
Refer to “I/O Multiplexing and Considerations” on page 21 for details on the pin mapping for this peripheral. One signal
can be mapped on several pins.
20.5 Product Dependencies
In order to use this EIC, other parts of the system must be configured correctly, as described below.
20.5.1 I/O Lines
Using the EIC’s I/O lines requires the I/O pins to be configured. Refer to “PORT” on page 379 for details.
20.5.2 Power Management
All interrupts are available in all sleep modes, but the EIC can be configured to automatically mask some interrupts in
order to prevent device wake-up.
The EIC will continue to operate in any sleep mode where the selected source clock is running. The EIC’s interrupts can
be used to wake up the device from sleep modes. Events connected to the Event System can trigger other operations in
the system without exiting sleep modes. Refer to “PM – Power Manager” on page 117 for details on the different sleep
modes.
20.5.3 Clocks
The EIC bus clock (CLK_EIC_APB) can be enabled and disabled in the Power Manager, and the default state of
CLK_EIC_APB can be found in the Peripheral Clock Masking section in “PM – Power Manager” on page 117.
A generic clock (GCLK_EIC) is required to clock the peripheral. This clock must be configured and enabled in the
Generic Clock Controller before using the peripheral. Refer to “GCLK – Generic Clock Controller” on page 95 for details.
This generic clock is asynchronous to the user interface clock (CLK_EIC_APB). Due to this asynchronicity, writes to
certain registers will require synchronization between the clock domains. Refer to “Synchronization” on page 341 for
further details.
20.5.4 DMA
Not applicable.
20.5.5 Interrupts
There are two interrupt request lines, one for the external interrupts (EXTINT) and one for non-maskable interrupt (NMI).
The EXTINT interrupt request line is connected to the interrupt controller. Using the EIC interrupt requires the interrupt
controller to be configured first. Refer to “Nested Vector Interrupt Controller” on page 34 for details.
The NMI interrupt request line is also connected to the interrupt controller, but does not require the interrupt to be
configured.
20.5.6 Events
The events are connected to the Event System. Using the events requires the Event System to be configured first. The
External Interrupt Controller generates events as pulses.
Refer to “EVSYS – Event System” on page 406 for details.
Signal Name Type Description
EXTINT[15..0] Digital Input External interrupt pin
NMI Digital Input Non-maskable interrupt pin