Data Sheet

336
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
20. EIC – External Interrupt Controller
20.1 Overview
The External Interrupt Controller (EIC) allows external pins to be configured as interrupt lines. Each interrupt line can be
individually masked and can generate an interrupt on rising, falling or both edges, or on high or low levels. Each external
pin has a configurable filter to remove spikes. Each external pin can also be configured to be asynchronous in order to
wake up the device from sleep modes where all clocks have been disabled. External pins can also generate an event.
A separate non-maskable interrupt (NMI) is also supported. It has properties similar to the other external interrupts, but is
connected to the NMI request of the CPU, enabling it to interrupt any other interrupt mode.
20.2 Features
z 16 external pins, plus one non-maskable pin
z Dedicated interrupt line for each pin
z Individually maskable interrupt lines
z Interrupt on rising, falling or both edges
z Interrupt on high or low levels
z Asynchronous interrupts for sleep modes without clock
z Filtering of external pins
z Event generation
z Configurable wake-up for sleep modes
20.3 Block Diagram
Figure 20-1. EIC Block Diagram
Fil
ter
Ed
g
e
/
Level
Detection
I
nterru
pt
Wak
e
E
vent
FILTENx
EXTINTx
intre
q_
extint
[
x
]
inwake
_
extint
[
x
]
e
vt
_
extint
[
x
]
Fil
t
e
r
Edge/Level
De
t
ec
t
io
n
I
nterrup
t
W
a
k
e
N
MIFILTEN
NMI
S
EN
S
E[2:0]
NMI
intre
q_
nm
i
inwake_nmi
SENSEx
[
2:0
]