Data Sheet

312
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
19.8.1.11 Interrupt Status
Name: INTSTATUS
Offset: 0x24
Reset: 0x00000000
Property: -
z Bits 31:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 11:0 – CHINTx [x=11..0]: Channel x Pending Interrupt
This bit is set when Channel x has pending interrupt.
This bit is cleared when the corresponding Channel x interrupts are disabled or the interrupts sources are cleared.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
AccessRRRRRRRR
Reset00000000
Bit 151413121110 9 8
CHINT11 CHINT10 CHINT9 CHINT8
AccessRRRRRRRR
Reset00000000
Bit 76543210
CHINT7 CHINT6 CHINT5 CHINT4 CHINT3 CHINT2 CHINT1 CHINT0
AccessRRRRRRRR
Reset00000000