Data Sheet

306

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181G–SAM-D21_Datasheet–09/2015

19.8.1.8 Software Trigger Control

Name: SWTRIGCTRL

Offset: 0x10

Reset: 0x00000000

Property: Write-Protected

z Bits 31:12 – Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to

zero when this register is written. These bits will always return zero when read.

z Bits 11:0 – SWTRIGx [x=11..0]: Channel x Software Trigger

This bit is cleared when the Channel Pending bit in the Channel Status register (CHSTATUS.PEND) for the corre-

sponding channel is set, or by writing a one to it.

This bit is set if CHSTATUS.PEND is already one, when writing a one to this bit.

Writing a zero to this bit will clear the bit.

Writing a one to this bit will generate a DMA software trigger on channel x, if CHSTATUS.PEND is zero for channel

Bit 3130292827262524

AccessRRRRRRRR

Reset00000000

Bit 2322212019181716

AccessRRRRRRRR

Reset00000000

Bit 151413121110 9 8

SWTRIG11 SWTRIG10

SWTRIG9 SWTRIG8

AccessRRRRR/WR/WR/WR/W

Reset00000000

Bit 76543210

SWTRIG7 SWTRIG6 SWTRIG5 SWTRIG4 SWTRIG3 SWTRIG2 SWTRIG1 SWTRIG0

AccessR/WR/WR/WR/WR/WR/WR/WR/W

Reset00000000