Data Sheet

301
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
19.8.1.3 CRC Data Input
Name: CRCDATAIN
Offset: 0x04
Reset: 0x00000000
Property: Write-Protected
z Bits 31:0 – CRCDATAIN[31:0]: CRC Data Input
These bits store the data for which the CRC checksum is computed. After the CRCDATAIN register has been writ-
ten, the number of cycles for the new CRC checksum to be ready is dependent of the configuration of the CRC
Beat Size bit group in the CRC Control register(CRCCTRL.CRCBEATSIZE). Each byte needs one clock cycle to
be calculated.
Bit 3130292827262524
CRCDATAIN[31:24]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 2322212019181716
CRCDATAIN[23:16]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 151413121110 9 8
CRCDATAIN[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit 76543210
CRCDATAIN[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000