Data Sheet

294
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
Table 19-2. DMAC SRAM Register Summary - Descriptor/Write-Back Memory Section
0x2C
PENDCH
7:0 PENDCH7 PENDCH6 PENDCH5 PENDCH4 PENDCH3 PENDCH2 PENDCH1 PENDCH0
0x2D 15:8
PENDCH11 PENDCH10 PENDCH9 PENDCH8
0x2E 23:16
0x2F 31:24
0x30
ACTIVE
7:0 LVLEX3 LVLEX2 LVLEX1 LVLEX0
0x31 15:8 ABUSY
ID[4:0]
0x32 23:16 BTCNT[7:0]
0x33 31:24 BTCNT[15:8]
0x34
BASEADDR
7:0 BASEADDR[7:0]
0x35 15:8 BASEADDR[15:8]
0x36 23:16 BASEADDR[23:16]
0x37 31:24 BASEADDR[31:24]
0x38
WRBADDR
7:0 WRBADDR[7:0]
0x39 15:8 WRBADDR[15:8]
0x3A 23:16 WRBADDR[23:16]
0x3B 31:24 WRBADDR[31:24]
0x3C
...
0x3E
Reserved
0x3F CHID 7:0 ID[3:0]
0x40 CHCTRLA 7:0
ENABLE SWRST
0x41
...
0x43
Reserved
0x44
CHCTRLB
7:0 LVL[1:0] EVOE EVIE EVACT[2:0]
0x45 15:8
TRIGSRC[5:0]
0x46 23:16 TRIGACT[1:0]
0x47 31:24 CMD[1:0]
0x48
...
0x4B
Reserved
0x4C CHINTENCLR 7:0 SUSP TCMPL TERR
0x4D CHINTENSET 7:0
SUSP TCMPL TERR
0x4E CHINTFLAG 7:0
SUSP TCMPL TERR
0x4F CHSTATUS 7:0
FERR BUSY PEND
Offset Name
Bit
Pos.
0x00
BTCTRL
7:0 BLOCKACT[1:0] EVOSEL[1:0] VALID
0x01 15:8 STEPSIZE[2:0] STEPSEL DSTINC SRCINC BEATSIZE[1:0]
0x02
BTCNT
7:0 BTCNT[7:0]
0x03 15:8 BTCNT[15:8]
Offset Name
Bit
Pos.