Data Sheet

293
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
19.7 Register Summary
Table 19-1. DMAC Register Summary
Offset Name
Bit
Pos.
0x00
CTRL
7:0 CRCENABLE DMAENABLE SWRST
0x01 15:8
LVLEN3 LVLEN2 LVLEN1 LVLEN0
0x02
CRCCTRL
7:0
CRCPOLY[1:0] CRCBEATSIZE[1:0]
0x03 15:8
CRCSRC[5:0]
0x04
CRCDATAIN
7:0 CRCDATAIN[7:0]
0x05 15:8 CRCDATAIN[15:8]
0x06 23:16 CRCDATAIN[23:16]
0x07 31:24 CRCDATAIN[31:24]
0x08
CRCCHKSUM
7:0 CRCCHKSUM[7:0]
0x09 15:8 CRCCHKSUM[15:8]
0x0A 23:16 CRCCHKSUM[23:16]
0x0B 31:24 CRCCHKSUM[31:24]
0x0C CRCSTATUS 7:0
CRCZERO CRCBUSY
0x0D DBGCTRL 7:0
DBGRUN
0x0E QOSCTRL 7:0
DQOS FQOS WRQOS
0x0F Reserved
0x10
SWTRIGCTRL
7:0 SWTRIG7 SWTRIG6 SWTRIG5 SWTRIG4 SWTRIG3 SWTRIG2 SWTRIG1 SWTRIG0
0x11 15:8
SWTRIG11 SWTRIG10 SWTRIG9 SWTRIG8
0x12 23:16
0x13 31:24
0x14
PRICTRL0
7:0 RRLVLEN0 LVLPRI0[3:0]
0x15 15:8 RRLVLEN1
LVLPRI1[3:0]
0x16 23:16 RRLVLEN2
LVLPRI2[3:0]
0x17 31:24 RRLVLEN3
LVLPRI3[3:0]
0x18
...
0x1F
Reserved
0x20
INTPEND
7:0 ID[3:0]
0x21 15:8 PEND BUSY FERR
SUSP TCMPL TERR
0x22 Reserved
0x23 Reserved
0x24
INTSTATUS
7:0 CHINT7 CHINT6 CHINT5 CHINT4 CHINT3 CHINT2 CHINT1 CHINT0
0x25 15:8
CHINT11 CHINT10 CHINT9 CHINT8
0x26 23:16
0x27 31:24
0x28
BUSYCH
7:0 BUSYCH7 BUSYCH6 BUSYCH5 BUSYCH4 BUSYCH3 BUSYCH2 BUSYCH1 BUSYCH0
0x29 15:8
BUSYCH11 BUSYCH10 BUSYCH9 BUSYCH8
0x2A 23:16
0x2B 31:24