Data Sheet

176
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
16.8.3 Interrupt Flag Status and Clear
Name: INTFLAG
Offset: 0x08
Reset: 0x00000000
Property: -
Note: Depending on the fuse settings, various bits of the INTFLAG register can be set to one at startup. Therefore the
user should clear those bits before using the corresponding interrupts.
z Bits 31:18 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 17 – DPLLLTO: DPLL Lock Timeout
This flag is cleared by writing a one to it.
This flag is set on a zero-to-one transition of the DPLL Lock Timeout bit in the Status register (PCLKSR.DPLLLTO)
and will generate an interrupt request if INTENSET.DPLLLTO is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the DPLL Lock Timeout interrupt flag.
z Bit 16 – DPLLLCKF: DPLL Lock Fall
This flag is cleared by writing a one to it.
This flag is set on a zero-to-one transition of the DPLL Lock Fall bit in the Status register (PCLKSR.DPLLLCKF)
and will generate an interrupt request if INTENSET.DPLLLCKF is one.
Writing a zero to this bit has no effect.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
DPLLLTO DPLLLCKF
AccessRRRRRRR/WR/W
Reset00000000
Bit 151413121110 9 8
DPLLLCKR B33SRDY BOD33DET BOD33RDY DFLLRCS
Access R/W R R R R/W R/W R/W R/W
Reset00000000
Bit 76543210
DFLLLCKC DFLLLCKF DFLLOOB DFLLRDY OSC8MRDY OSC32KRDY XOSC32KRDY XOSCRDY
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000