Data Sheet

139
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
15.8.9 APBB Mask
Name: APBBMASK
Offset: 0x1C
Reset: 0x0000007F
Property: Write-Protected
z Bits 31:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 5 – USB: USB APB Clock Enable
0: The APBB clock for the USB is stopped.
1: The APBB clock for the USB is enabled.
z Bit 4 – DMAC: DMAC APB Clock Enable
0: The APBB clock for the DMAC is stopped.
1: The APBB clock for the DMAC is enabled.
z Bit 3 – PORT: PORT APB Clock Enable
0: The APBB clock for the PORT is stopped.
1: The APBB clock for the PORT is enabled.
z Bit 2 – NVMCTRL: NVMCTRL APB Clock Enable
0: The APBB clock for the NVMCTRL is stopped.
1: The APBB clock for the NVMCTRL is enabled.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
AccessRRRRRRRR
Reset00000000
Bit 151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit 76543210
USB DMAC PORT NVMCTRL DSU PAC1
Access R R R/W R/W R/W R/W R/W R/W
Reset00111111