Data Sheet

137
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
15.8.8 APBA Mask
Name: APBAMASK
Offset: 0x18
Reset: 0x0000007F
Property: Write-Protected
z Bits 31:7 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 6 – EIC: EIC APB Clock Enable
0: The APBA clock for the EIC is stopped.
1: The APBA clock for the EIC is enabled.
z Bit 5 – RTC: RTC APB Clock Enable
0: The APBA clock for the RTC is stopped.
1: The APBA clock for the RTC is enabled.
z Bit 4 – WDT: WDT APB Clock Enable
0: The APBA clock for the WDT is stopped.
1: The APBA clock for the WDT is enabled.
z Bit 3 – GCLK: GCLK APB Clock Enable
0: The APBA clock for the GCLK is stopped.
1: The APBA clock for the GCLK is enabled.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
AccessRRRRRRRR
Reset00000000
Bit 151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit 76543210
EIC RTC WDT GCLK SYSCTRL PM PAC0
Access R R/W R/W R/W R/W R/W R/W R/W
Reset01111111