Data Sheet

130
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
15.8.2 Sleep Mode
Name: SLEEP
Offset: 0x01
Reset: 0x00
Property: Write-Protected
z Bits 7:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 1:0 – IDLE[1:0]: Idle Mode Configuration
These bits select the Idle mode configuration after a WFI instruction.
Table 15-6. Idle Mode Configuration
Bit 76543210
IDLE[1:0]
AccessRRRRRRR/WR/W
Reset00000000
IDLE[1:0] Name Description
0x0 CPU The CPU clock domain is stopped
0x1 AHB The CPU and AHB clock domains are stopped
0x2 APB The CPU, AHB and APB clock domains are stopped
0x3 Reserved