Data Sheet

126
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
15.6.3 SleepWalking
SleepWalking is the capability for a device to temporarily wakeup clocks for peripheral to perform a task without waking-
up the CPU in STANDBY sleep mode. At the end of the sleepwalking task, the device can either be waken-up by an
interrupt (from a peripheral involved in SleepWalking) or enter again into STANDBY sleep mode.
In Atmel | SMART SAM D21 devices, SleepWalking is supported only on GCLK clocks by using the on-demand clock
principle of the clock sources. Refer to “On-demand, Clock Requests” on page 93 for more details.
15.6.4 DMA Operation
Not applicable.
15.6.5 Interrupts
The peripheral has the following interrupt sources:
z Clock Ready flag
Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status and Clear
(INTFLAG) register is set when the interrupt condition occurs. Each interrupt can be individually enabled by writing a one
to the corresponding bit in the Interrupt Enable Set (INTENSET) register, and disabled by writing a one to the
corresponding bit in the Interrupt Enable Clear (INTENCLR) register. An interrupt request is generated when the interrupt
flag is set and the corresponding interrupt is enabled. The interrupt request remains active until the interrupt flag is
cleared, the interrupt is disabled or the peripheral is reset. An interrupt flag is cleared by writing a one to the
corresponding bit in the INTFLAG register. Each peripheral can have one interrupt request line per interrupt source or
one common interrupt request line for all the interrupt sources. Refer to “Nested Vector Interrupt Controller” on page 34
for details. If the peripheral has one common interrupt request line for all the interrupt sources, the user must read the
INTFLAG register to determine which interrupt condition is present.
15.6.6 Events
Not applicable.
15.6.7 Sleep Mode Operation
In all IDLE sleep modes, the power manager is still running on the selected main clock.
In STANDDBY sleep mode, the power manager is frozen and is able to go back to ACTIVE mode upon any
asynchronous interrupt.