Data Sheet

118
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
15.3 Block Diagram
Figure 15-1. PM Block Diagram
15.4 Signal Description
Refer to “I/O Multiplexing and Considerations” on page 21 for details on the pin mapping for this peripheral. One signal
can be mapped on several pins.
15.5 Product Dependencies
In order to use this peripheral, other parts of the system must be configured correctly, as described below.
15.5.1 I/O Lines
Not applicable.
15.5.2 Power Management
Not applicable.
SYNCHRONOUS
CLOCK CONTROLLER
SLEEP MODE
CONTROLLER
RESET
CONTROLLER
CPU
BOD12
BOD33
POR
WDT
GCLK
RESET SOURCES
PERIPHERALS
RESET
CLK_APB
CLK_AHB
CLK_CPU
USER RESET
POWER RESET
POWER MANAGER
CPU
Signal Name Type Description
RESET Digital input External reset